The PP instruction set lacked, for example, extensive arithmetic capabilities and did not run user code; the peripheral processor subsystem's purpose was to process I / O and thereby free the more powerful central processor unit ( s ) to running user computations.
22.
In order to take advantage of this, the 6600 and 7600 left mundane housekeeping tasks, printing output or reading punched cards for instance, to a series of ten smaller 12-bit machines based on the CDC 160A known as " Peripheral Processor Units ", or PPUs.
23.
The peripheral processor subsystem used a technique known as " barrel and slot " to share the execution unit; each PP had its own memory and registers, but the processor ( the slot ) itself executed one instruction from each PP in turn ( the barrel ).
24.
The X8 included an independent peripheral processor called CHARON ( Centraal Hulporgaan Autonome Regeling Overdracht Nevenapparatuur, or Central Coprocessor Autonomous Regulation Transfer Peripherals ) which handled I / O . Other features included up to 48 input / output channels designed for low speed devices such as paper tape, plotters and printers.
25.
The " Peripheral Processor " was a separate system dedicated entirely to quickly running the operating system and programs running within it, as well as feeding data to the CPU . The PP was built out of eight " virtual processors " ( VPs ), which were designed to handle instructions and basic integer arithmetic only.
26.
Peripheral processor hardware is simpler; it has an 18-bit A ( accumulator register, a 12-bit Program Address register, a 12-bit Q register ( not programmer-visible ), and a 22-bit R register ( used to accomplish address relocation during central memory read and write instructions on Cyber 180 systems ).
27.
Subsequent modifications to the series in 1969 included the extension to 20 peripheral and control processors with 24 channels . ( A 30-PPU 6600 machine was operated by Control Data's Software Research Lab during 1971-1973, but this version was never sold commercially . ) Control Data also marketed a CDC 6400 with a smaller number of peripheral processors, the CDC 6415-7 with seven peripheral processors to reduce cost.
28.
Subsequent modifications to the series in 1969 included the extension to 20 peripheral and control processors with 24 channels . ( A 30-PPU 6600 machine was operated by Control Data's Software Research Lab during 1971-1973, but this version was never sold commercially . ) Control Data also marketed a CDC 6400 with a smaller number of peripheral processors, the CDC 6415-7 with seven peripheral processors to reduce cost.
29.
A Cyber 170-series system consisted of one or two CPUs that ran at either 25 or 40 MHz, and was equipped with 10, 14, 17, or 20 peripheral processors ( PP ), and up to 24 high-performance channels for high-speed I / O . Due to the relatively slow memory reference times of the CPU ( in some models, memory reference instructions were slower than floating-point divides ), the higher-end CPUs ( e . g ., Cyber-74, Cyber-76, Cyber-175, and Cyber-176 ) were equipped with eight or twelve words of high-speed memory used as an instruction cache.
