Contained within the PSW are the two bit condition code, representing zero, positive, negative, and similar flags of other architectures'status registers.
22.
PCI devices therefore generally attempt to avoid using the all-ones value in important status registers, so that such an error can be easily detected by software.
23.
While the general-purpose and floating-point registers are discussed the most, flag and status registers or even individual status bits are commonly renamed as well.
24.
Otherwise, the ISR has to then push an extra copy of the status register so it can restore the register sizes prior to pulling them from the stack.
25.
There are three hard registers in the 990; the Workspace Pointer ( WP ), the Program Counter ( PC ) and the Status register ( ST ).
26.
Except for the first two ( r16 = pc = program counter, r17 = sr = status register ), they are dedicated to exception and interrupt handling.
27.
PCI devices therefore are generally designed to avoid using the all-ones value in important status registers, so that such an error can be easily detected by software.
28.
There are 8 special registers : program counter, interrupt stack pointer ISP, interrupt vector address register INTBASE, status register PSR, configuration register and 3 debug registers.
29.
The "'SystemRDL "'language, supported by the SPIRIT Consortium, was specifically designed to describe and implement a wide variety of control status registers.
30.
The 65C02 addresses these problems by causing the D flag to be cleared at reset or upon receipt of an interrupt ( after the status register is pushed onto the stack ).
