| 1. | The triggering of maskable interrupts can be stopped in some time-critical functions.
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| 2. | Hardware interrupts are divided into maskable interrupts and non-maskable interrupts ( NMI ).
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| 3. | Hardware interrupts are divided into maskable interrupts and non-maskable interrupts ( NMI ).
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| 4. | There is only one maskable interrupt.
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| 5. | It provided only floppy disk and Centronics parallel interfaces, plus a non-maskable interrupt button.
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| 6. | A common use of a hybrid interrupt is for the NMI ( non-maskable interrupt ) input.
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| 7. | The hardware used the Non Maskable Interrupt ( NMI ) to take control back to the emulation code.
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| 8. | IF does not affect the handling of non-maskable interrupts or software interrupts generated by the INT instruction.
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| 9. | One unassigned line of the S-100 bus then was reassigned to support the non-maskable interrupt request.
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| 10. | Any value written to NMIRES resets the bits in NMIST which indicate the reason for the most recent Non-Maskable Interrupt.
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